EE457 - Summer 2017 Computer Systems Organization


Homework will be assigned roughly once per week. It will be graded and require substantial work.

For detailed information on late submission policies, grace periods, and similar questions about assignments, check the syllabus.

Please ask any questions at our course Piazza Q&A site.

HW Schedule

HW Topic Due Date Solution
HW01 Digital Design Review Thurs. July 6 in class Link
HW02 Computer Arithmetic Tues. July 11 in class Link
HW03 Instruction Sets Tues. July 18 in class Link
HW04 Performance Metrics Tues. July 18 in class Link
HW05 Single Cycle CPU Thurs. July 20 in class Link
HW06 Cache Memory Tues. Aug. 1 in class Link
HW07 Virtual Memory Thurs. Aug. 3 in class Link


Before you start your labs you should choose your appopriate Modelsim setup option

Lab Topic Due Date
Lab 1 Min/Max Finder Fri. July 7 at 11:59PM (PST)
Lab 2 FIFO Lab Fri. July 14 at 11:59PM (PST)
Lab 3 Pipelined Processor (2 Parts) Part 1 Due Tues. July 25,
Part 2 Due Fri. Jul. 28, at 11:59PM (PST)
Lab 4 Cache & Coherence Fri. Aug. 4 at 11:59PM (PST)
Lab 5 FIFO/ROB Design Wed. Aug. 9 at 11:59PM (PST)