EE 209 - Fall 2017 Foundations of Digital System Design

Lectures

Lecture Schedule

Lecture Topic Slides
01 Course Overview
(Vahid Ch. 1)
Notes
02 Combinational vs. Sequential, Overview of Clocking Methodologies, Design Goals; Logic Functions
(Vahid: 2.6, 2.8)
Notes
Complete
03 Boolean Algebra (Single variable), Decoders & Muxes
(Vaid: 2.5-2.9)
Notes
Complete
04 Minterms, Maxterms, Canonical Sums, Logic Function Synthesis using Boolean Algebra, Structural Verilog
(Vahid: 2.7, 9.2)
Notes
Complete
Verilog
04 Sep, Labor Day, university holiday
05 Logic Function Synthesis using Karnaugh Maps
(Vahid: 6.2)
Notes
Complete
06 More Karnaugh Maps, Registers, State Machines Design Overview
(Vahid: 3.2, 4.2)
Notes
Complete
07 State Machine Design
(Vahid: 3.3-3.4)
Notes
Complete
13 Sep, Quiz 1, 19:00 - 20:00, location: SAL 101
08 More State Machine Design
(Vahid: 3.3-3.4)
[cont.]
09 Transistor Switching Models; nMOS, pMOS, CMOS
(Vahid: 2.1-2.4)
Notes
Complete
10 More CMOS; Overview of fabrication process
(Vahid: 3.3-3.4)
[cont.]
11 Datapath Components (Adders and Counters)
(Vahid: 4.3.-4.4, 4.9)
Notes
Complete
12 Memories + Midterm Review [cont.]
13 Datapath Components (Fast Adders, Comparators, Memories)
(Vahid: 4.6-4.7, 6.5)
Notes
Complete
04 Oct, Exam 1, 19:00 - 21:00, location: SAL 101
14 More datapath components (Fast adders and Multipliers) [cont.]
15 Negative Logic, One-hot State Machine Design, System Design Example: Multiplier
(Vahid: 6.3)
Notes
Complete
16 System Design Examples: Multiplier & Vending Machine [cont.]
17 Combinational synthesis with muxes & memories
(Vahid: 2.5, 2.7)
Notes
Complete
18 Sequential components (Bistables, latches, FFs)
(Vahid: 3.2, 4.9)
Notes
Complete
19 MOS Theory Notes
Complete
25 Oct, Quiz 2, 19:00 - 20:00, location: SAL 101
20 More MOS Theory [cont.]
21 Capacitance, Delay, and Sizing Notes
Complete
22 More Capacitance and Delay [cont.]
23 Layout Notes
Complete
24 Memory Cells and Sequential components
Notes
Complete
25 ASIC vs. FPGA, Hardware/Software Interfacing, PicoBlaze
(Vahid: 7.1-7.3)
Notes
Complete
26 Project Overview & More Interfacing [cont.]
27 Examples Notes
22, 23 Nov, Thanksgiving, university holiday
28 Single-Cycle CPU Notes
29 Nov, Exam 2, 19:00 - 21:00, location: SAL 101